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Brno University of Technology, Czech Republic

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Posts and Telecommunications Institute of Technology, Ho Chi Minh City, Vietnam

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University of Pardubice, Czech Republic

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Delhi Technological University, India

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Ho Chi Minh City University of Technology and Education, Vietnam

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DIMES Department of University of Calabria, Italy

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Henan Polytechnic University, China

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Ho Chi Minh City University of Transport, Vietnam

Anh-Tu Le
Ho Chi Minh City University of Transport, Vietnam

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Ton Duc Thang University, Vietnam


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Heuristic Synthesis of Reversible Logic – A Comparative Study

Chua Shin Cheng, Ashutosh Kumar Singh

DOI: 10.15598/aeee.v12i3.916


Abstract

Reversible logic circuits have been historically motivated by theoretical research in low-power, and recently attracted interest as components of the quantum algorithm, optical computing and nanotechnology. However due to the intrinsic property of reversible logic, traditional irreversible logic design and synthesis methods cannot be carried out. Thus a new set of algorithms are developed correctly to synthesize reversible logic circuit. This paper presents a comprehensive literature review with comparative study on heuristic based reversible logic synthesis. It reviews a range of heuristic based reversible logic synthesis techniques reported by researchers (BDD-based, cycle-based, search-based, non-search-based, rule-based, transformation-based, and ESOP-based). All techniques are described in detail and summarized in a table based on their features, limitation, library used and their consideration metric. Benchmark comparison of gate count and quantum cost are analysed for each synthesis technique. Comparing the synthesis algorithm outputs over the years, it can be observed that different approach has been used for the synthesis of reversible circuit. However, the improvements are not significant. Quantum cost and gate count has improved over the years, but arguments and debates are still on certain issues such as the issue of garbage outputs that remain the same. This paper provides the information of all heuristic based synthesis of reversible logic method proposed over the years. All techniques are explained in detail and thus informative for new reversible logic researchers and bridging the knowledge gap in this area.

Keywords


Ancilla input; garbage output; heuristic; quantum cost; reversible logic; synthesis.

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