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University of Zilina, Slovakia

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The University of Sydney, Australia

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University of Zilina, Slovakia

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National Taiwan University of Science and Technology, Taiwan, Province of China

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UPC Broadband Slovakia, Slovakia

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University of Defence, Czech Republic

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University College Dublin, Ireland

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University of Zilina, Slovakia

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VSB - Technical University of Ostrava, Czech Republic

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Brno University of Technology, Czech Republic

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Brno University of Technology, Czech Republic

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Brno University of Technology, Czech Republic

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University of Zilina, Slovakia

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Ankara University, Turkey

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VSB - Technical University of Ostrava, Czech Republic

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Academy of Sciences of the Czech Republic, Czech Republic

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University of Defence, Czech Republic

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Brno University of Technology, Czech Republic

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University of Hradec Kralove, Czech Republic

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University of Bielsko-Biala, Poland

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Technical University of Radom, Poland

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Technical University of Kosice, Slovakia

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University of Rome "La Sapienza", Italy

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University of Economics in Katowice, Katowice, Poland

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Honeywell International, Czech Republic

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Brno University of Technology, Czech Republic

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Sutcu Imam University, Turkey

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Slovak University of Technology, Slovakia

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VSB - Technical University of Ostrava, Czech Republic

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The University of Edinburgh, United Kingdom

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Tomas Bata University in Zlin, Czech Republic

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University of Zilina, Slovakia

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University of Defence, Czech Republic

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Technical University of Cluj Napoca, Romania

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National Research University "MPEI", Russian Federation

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Guanajuato University, Mexico

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University of Pardubice, Czech Republic

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University of West Bohemia in Plzen, Czech Republic

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Technical University of Cluj Napoca, Romania

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Warsaw University of Technology, Poland

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Isfahan University of Technology, Iran, Islamic Republic Of

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DIMES Department of University of Calabria, Italy

Pavel Vaclavek
Brno University of Technology, Czech Republic

Martin Vaculik
University of Zilina, Slovakia

Viktor Valouch
Academy of Sciences of the Czech Republic, Czech Republic

Vladimir Vasinek
VSB - Technical University of Ostrava, Czech Republic

Jiri Vodrazka
Czech Technical University in Prague, Czech Republic

Miroslav Voznak
VSB - Technical University of Ostrava, Czech Republic

Otakar Wilfert
Brno University of Technology, Czech Republic

Jan Zidek
VSB - Technical University of Ostrava, Czech Republic


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Heuristic Synthesis of Reversible Logic – A Comparative Study

Chua Shin Cheng, Ashutosh Kumar Singh

DOI: 10.15598/aeee.v12i3.916


Abstract

Reversible logic circuits have been historically motivated by theoretical research in low-power, and recently attracted interest as components of the quantum algorithm, optical computing and nanotechnology. However due to the intrinsic property of reversible logic, traditional irreversible logic design and synthesis methods cannot be carried out. Thus a new set of algorithms are developed correctly to synthesize reversible logic circuit. This paper presents a comprehensive literature review with comparative study on heuristic based reversible logic synthesis. It reviews a range of heuristic based reversible logic synthesis techniques reported by researchers (BDD-based, cycle-based, search-based, non-search-based, rule-based, transformation-based, and ESOP-based). All techniques are described in detail and summarized in a table based on their features, limitation, library used and their consideration metric. Benchmark comparison of gate count and quantum cost are analysed for each synthesis technique. Comparing the synthesis algorithm outputs over the years, it can be observed that different approach has been used for the synthesis of reversible circuit. However, the improvements are not significant. Quantum cost and gate count has improved over the years, but arguments and debates are still on certain issues such as the issue of garbage outputs that remain the same. This paper provides the information of all heuristic based synthesis of reversible logic method proposed over the years. All techniques are explained in detail and thus informative for new reversible logic researchers and bridging the knowledge gap in this area.

Keywords


Ancilla input; garbage output; heuristic; quantum cost; reversible logic; synthesis.

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